Electronics and Communication Gate 2026 Questions with Answer

Ques 14 GATE 2026


Consider a real, narrowband signal x(t) = A(t)cos[2πfct + θ(t)] where the maximum frequency components of A(t) and θ(t) are fM and fc (= 1000 fM), respectively.
Which of the following statements is/are correct for −∞ < t < ∞?

A

x(t) represents a PSK modulated signal for suitable choices of A(t) and θ(t).

B

x(t) represents an amplitude modulated signal for suitable choices of A(t) and θ(t).

C

x(t) represents a band-limited Gaussian noise process.

D

x(t) never represents a narrowband FM signal.


() is the correct answer.

Ques 15 GATE 2026


The average bit error rate at the input of a (7, 4, 1) Hamming decoder is 0.10.
The probability that the decoder will fail to decode a received word correctly is __.
(rounded off to two decimal places)


() is the correct answer.

Ques 16 GATE 2026


A control system is shown in the Figure.
Which option represents the correct transfer function of the system?

A

1/(s+4)2

B

1/(s+4)

C

2/(s+4)

D

1/(s2+8s+17)


() is the correct answer.

Ques 17 GATE 2026


For the control system shown in the Figure, the transfer function of a plant, G(s) = 1/[(s+1)(s+2)] is connected in cascade with a compensator C(s) = K(s + α), where K and α are positive real valued constants.
Which of the following pairs (K, α) represent the correct values for the closed loop system to have poles at (−3 ± j√5)?

A

2, 3

B

3, 4

C

2, 4

D

3, 3


() is the correct answer.

Ques 18 GATE 2026


The state and output equations for a control system are:

Which of the following expressions correctly represents the transfer function Y(s)/U(s) of the system with zero initial conditions?

A

3s/(s2+4s−6)

B

(3s+5)/(s2+4s−6)

C

(3s+5)/(s2+4s+6)

D

3s/(s2+4s+6)


() is the correct answer.

Ques 19 GATE 2026


Consider the unity negative feedback control system shown in the Figure.
The value of gain K (>0) at which the given system will remain marginally stable is __.
(Answer in integer)


(1386) is the correct answer.

Ques 20 GATE 2026


In the circuit shown in the Figure, A and B are logic inputs and Y is the logic output.
Which of the following logic operations is realized by the circuit?

A

NOR

B

OR

C

XOR

D

AND


() is the correct answer.

Ques 21 GATE 2026


A binary ripple counter is designed to count (0)10 to (64)10.
Which of the following is/are the number of flip-flops required to design the counter?

A

6

B

7

C

4

D

5


() is the correct answer.

Ques 22 GATE 2026


The negative edge triggered JK flip-flop in the Figure has J and K inputs tied to Logic High and a square wave of 10 cycles/second is applied to its clock (C) input.
The frequency of the output Q (in cycles/second) is __.
(rounded off to two decimal places)


(5.00) is the correct answer.

Ques 23 GATE 2026


The address of the first location of a 256 kilo byte (KB) memory is (2500)H.
Choose the correct address of the last location of the memory.

A

(2FFF)H

B

(124FF)H

C

(424FF)H

D

(324FF)H


() is the correct answer.

Ques 24 GATE 2026


What is the 10′s complement of (47)10?

A

52

B

53

C

54

D

55


() is the correct answer.

Ques 25 GATE 2026


A Boolean function, f(x,y,z) with x as MSB and z as LSB is realized by 4:1 multiplexer (MUX) with select lines, S1 and S0 (S1 is MSB, S0 is LSB) and inputs, I0, I1, I2, I3 as shown in the Figure.
Which of the following options is the correct expression of f(x,y,z)?

A

xz + y

B

xȳ + z

C

xy + z̄

D

x̄y + z̄


() is the correct answer.

Ques 26 GATE 2026


A shift-left Shift Register (SR) and a D flip-flop are connected to a synchronized clock as shown in the Figure. Assume that the SR and D flip-flops are initially cleared and the XOR gate has no propagation delay.
Which of the following options gives the correct binary representation (b7b6b5b4b3b2b1b0) of the content of the shift register immediately after the 5th clock transition (positive edge)?

A

00011111

B

10111111

C

00111111

D

11000011


() is the correct answer.

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