Electronics & Communication Gate Yearwise
Electronics and Communication GATE 2017 Set-2 Questions with Answer
Ques 1 Analog Communication
The unmodulated carrier power in an AM transmitter is 5 kW. This carrier is modulated by a sinusoidal modulating signal. The maximum percentage of modulation is 50%. If it is reduced to 40%, then the maximum unmodulated carrier power (in kW) that can be used without overloading the transmitter is
5.21 is the correct answer.
Ques 2 Analog Communication
A modulating signal given by x(t)=5sin(4π103t-10πcos2π103t) V is fed to a phase modulator with phase deviation constant kp=5 rad/V. If the carrier frequency is 20 kHz, the instantaneous frequency (in kHz) at t=0.5 ms is
70 is the correct answer.
Ques 3 Control Systems
For the system shown in the figure, Y(s)/X(s)=

1 is the correct answer.
Ques 4 Control Systems
Consider the state space realization

5 is the correct answer.
Ques 5 Control Systems
Which of the following statements is incorrect?
Ques 6 Control Systems
A unity feedback control system is characterized by the open-loop transfer function
G(s)=2(s+1)/(s3+ks2+2s+1).
The value of k for which the system oscillates at 2 rad/s is
0.75 is the correct answer.
Ques 7 Control Systems
A second-order LTI system is described by the following state equations.
d/dt x1(t)-x2(t)=0 and
d/dt x2(t)+2x1(t)+3x2(t)=r(t) where x1(t) and x2(t)
are the two state variables and r(t) denotes the input. The output c(t)=x1(t). The system is
Ques 8 Control Systems
A unity feedback control system is characterized by the open-loop transfer function
G(s)=10K(s+2)/(s3+3s2+10).
The Nyquist path and the corresponding Nyquist plot of G(s) are shown in the figures below.

Ques 9 Digital Circuits
For the circuit shown in the figure. P and Q are the inputs and Y is the output.

Ques 10 Digital Circuits
Consider the circuit shown in the figure.

Ques 11 Digital Circuits
In a DRAM,
Ques 12 Digital Circuits
The state diagram of a finite state machine (FSM) designed to detect an overlapping sequence of three bits is shown in the figure. The FSM has an input 'In' and an output 'Out'. The initial state of the FSM is S0.

4 is the correct answer.
Ques 13 Digital Circuits
Figure I shows a 4-bit ripple carry adder realized using full adders and Figure II shows the circuit of a full-adder (FA). The propagation delay of the XOR, AND and OR gates in Figure II are 20 ns, 15 ns and 10 ns, respectively. Assume all the inputs to the 4-bit adder are initially reset to 0. At t=0 the inputs to the 4-bit adder are changed to X3X2X1X0=1100, Y3Y2Y1Y0=0100 and Z0=1. The output of the ripple carry adder will be stable at t(in ns)=

50 is the correct answer.

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