Electronics and Communication Gate 2017 Set-2 Questions with Answer

Ques 1 GATE 2017 SET-2

The unmodulated carrier power in an AM transmitter is 5 kW. This carrier is modulated by a sinusoidal modulating signal. The maximum percentage of modulation is 50%. If it is reduced to 40%, then the maximum unmodulated carrier power (in kW) that can be used without overloading the transmitter is

(5.21) is the correct answer.

Ques 2 GATE 2017 SET-2

A modulating signal given by x(t)=5sin(4π10³t-10πcos2π10³t) V is fed to a phase modulator with phase deviation constant k_p=5 rad/V. If the carrier frequency is 20 kHz, the instantaneous frequency (in kHz) at t=0.5 ms is

(70) is the correct answer.

Ques 3 GATE 2017 SET-2

For the system shown in the figure, Y(s)/X(s)=

(1) is the correct answer.

Ques 4 GATE 2017 SET-2

Consider the state space realization

The value of lim_t→∞|√(x₁²(t)+x₂²(t))| is

(5) is the correct answer.

Ques 5 GATE 2017 SET-2

Which of the following statements is incorrect?

Lead compensator is used to reduce the settling time.

Lag compensator is used to reduce the steady state error.

Lead compensator may increase the order of a system.

Lag compensator always stabilizes an unstable system.

(d) is the correct answer.

Ques 6 GATE 2017 SET-2

A unity feedback control system is characterized by the open-loop transfer function
G(s)=2(s+1)/(s³+ks²+2s+1).
The value of k for which the system oscillates at 2 rad/s is

(0.75) is the correct answer.

Ques 7 GATE 2017 SET-2

A second-order LTI system is described by the following state equations.
d/dt x₁(t)-x₂(t)=0 and
d/dt x₂(t)+2x₁(t)+3x₂(t)=r(t) where x₁(t) and x₂(t)
are the two state variables and r(t) denotes the input. The output c(t)=x₁(t). The system is

undamped (oscillatory)

underdamped

critically damped

overdamped

(d) is the correct answer.

Ques 8 GATE 2017 SET-2

A unity feedback control system is characterized by the open-loop transfer function
G(s)=10K(s+2)/(s³+3s²+10).
The Nyquist path and the corresponding Nyquist plot of G(s) are shown in the figures below.

If 0<K<1, then the number of poles of the closed-loop transfer function that lie in the right-half of the s-plane is

Ques 9 GATE 2017 SET-2

For the circuit shown in the figure. P and Q are the inputs and Y is the output.

The logic implemented by the circuit is

XNOR

XOR

NOR

(mark to all) is the correct answer.

Ques 10 GATE 2017 SET-2

Consider the circuit shown in the figure.

The Boolean expression F implemented by the circuit is

X̄ȲZ̄+XY+ȲZ

X̄ȲZ̄+XZ+ȲZ

(b) is the correct answer.

Ques 11 GATE 2017 SET-2

In a DRAM,

periodic refreshing is not required

information is stored in a capacitor

information is stored in a latch

both read and write operations can be performed simultaneously

(b) is the correct answer.

Ques 12 GATE 2017 SET-2

The state diagram of a finite state machine (FSM) designed to detect an overlapping sequence of three bits is shown in the figure. The FSM has an input 'In' and an output 'Out'. The initial state of the FSM is S₀.

If the input sequence is 10101101001101, starting with the left-most bit, then the number of times 'Out' will be 1 is

(4) is the correct answer.

Ques 13 GATE 2017 SET-2

Figure I shows a 4-bit ripple carry adder realized using full adders and Figure II shows the circuit of a full-adder (FA). The propagation delay of the XOR, AND and OR gates in Figure II are 20 ns, 15 ns and 10 ns, respectively. Assume all the inputs to the 4-bit adder are initially reset to 0. At t=0 the inputs to the 4-bit adder are changed to X₃X₂X₁X₀=1100, Y₃Y₂Y₁Y₀=0100 and Z₀=1. The output of the ripple carry adder will be stable at t(in ns)=

(50) is the correct answer.

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