Electronics and Communication GATE 2023 Questions with Answer

Ques 1 Analog Circuits

A cascade of common-source amplifiers in a unity gain feedback configuration oscillates when

Ques 2 Analog Circuits

The V_OUT/V_IN of the circuit shown below is

Ques 3 Analog Circuits

In the circuit shown below, D₁ and D₂ are silicon diodes with cut-in voltage of 0.7 V. V_IN and V_OUT are input and output voltages in volts. The transfer characteristic is

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Ques 4 Communication Systems

Let a frequency modulated (FM) signal
x(t) = A cos(ω_ct + k_f ∫^t_-∞m(λ)dλ) where m(t) is a message signal of bandwidth W. It is passed through a non-linear system with output y(t) = 2x(t) + 5(x(t))². Let B_T denote the FM bandwidth. The minimum value of ω_c required to recover x(t) from y(t) is

Ques 5 Control Systems

The open loop transfer function of a unity negative feedback system is G(s) = k/s(1 + sT₁)(1 + sT₂). where k, T₁ and T₂ are positive constants. The phase cross-over frequency, in rad/s, is

Ques 6 Control Systems

A closed loop system is shown in the figure where k>0 and α>0. The steady state error due to a ramp input (R(s) = α/s²) is given by

Ques 7 Control Systems

In the following block diagram, R(s) and D(s) are two inputs. The output Y(s) is expressed as Y(s) = G₁(s)R(s) + G₂(s)D(s). G₁(s) and G₂(s) are given by

Ques 8 Control Systems

The state equation of a second order system is
x(t) = Ax(t), x(0) is the initial condition.
Suppose λ₁ and λ₂ are two distinct eigenvalues of A and v₁ and v₂ are the corresponding eigenvectors. For constants α₁ and α₂, the solution, x(t), of the state equation is

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Ques 9 Control Systems

The asymptotic magnitude Bode plot of a minimum phase system is shown in the figure. The transfer function of the system is H(s) = k(s + z)^a/s^b(s + p)^c where k, z, p, a, b, c are positive constants. The value of (a + b + c) is ____ (rounded off to the nearest integer).

Ques 10 Digital Circuits

In the circuit shown below, P and Q are the inputs. The logical function realized by the circuit shown below is

Ques 11 Digital Circuits

The synchronous sequential circuit shown below works at a clock frequency of 1 GHz. The throughput, in Mbits/s, and the latency, in ns, respectively, are

Ques 12 Digital Circuits

For the circuit shown below, the propagation delay of each NAND gate is 1 ns. The critical path delay, in ns, is ____ (rounded off to the nearest integer).

Ques 13 Digital Circuits

In a given sequential circuit, initial states are Q₁ = 1 and Q₂ = 0. For a clock frequency of 1 MHz, the frequency of signal Q₂ in kHz, is ____ (rounded off to the nearest integer).