Digital Logic Design GATE previous year questions with answer
Ques 1 Gate 2024 Set-2
A processor uses a 32-bit instruction format and supports byte-addressable memory
access. The ISA of the processor has 150 distinct instructions. The instructions are
equally divided into two types, namely R-type and I-type, whose formats are shown
below.
R-type Instruction Format:

Let π be the number of bits used to encode the UNUSED field, π be the number of bits used to encode the OPCODE field, and π be the number of bits used to encode the immediate value/address field. The value of π + 2π + π is ________
Explanation:
Let us break down the sizing of each individual field in the 32-bit instruction format based on the given constraints.
1. Calculate the Sizing of the OPCODE Field (Y):
β’ The processor supports 150 distinct instructions, which are equally divided into two types: 75 R-type and 75 I-type instructions.
β’ To uniquely encode 75 distinct operations within either type, we need:
26 < 75 ≤ 27 → 7 bits are required to indicate the operation.
β’ The problem states that in the OPCODE field, 1 extra bit is explicitly used to distinguish between I-type and R-type configurations.
Total OPCODE bits (Y) = 1 bit (type identifier) + 7 bits (operation identifier) = 8 bits.
2. Calculate the Sizing of the Register Fields:
β’ The processor contains 50 architectural registers.
β’ To address any one of these 50 unique registers, the number of bits required per field is:
25 < 50 ≤ 26 → 6 bits per register field.
3. Calculate the Sizing of the UNUSED Field (X) in R-type format:
β’ An R-type instruction consists of: [ OPCODE ] [ UNUSED ] [ DST Register ] [ SRC Register 1 ] [ SRC Register 2 ].
β’ The total instruction size is 32 bits.
32 = Y + X + (3 × Register Field Bits)
32 = 8 + X + (3 × 6)
32 = 8 + X + 18
32 = X + 26 → X = 32 - 26 = 6 bits.
4. Calculate the Sizing of the Immediate Field (Z) in I-type format:
β’ An I-type instruction consists of: [ OPCODE ] [ DST Register ] [ SRC Register ] [ Immediate Value/Address ].
32 = Y + (2 × Register Field Bits) + Z
32 = 8 + (2 × 6) + Z
32 = 8 + 12 + Z
32 = 20 + Z → Z = 32 - 20 = 12 bits.
5. Compute the Final Expression (X + 2Y + Z):
β’ X = 6
β’ Y = 8
β’ Z = 12
X + 2Y + Z = 6 + 2(8) + 12
X + 2Y + Z = 6 + 16 + 12 = 34.
Ques 2 Gate 2024 Set-2
Consider 4-variable functions f1, f2, f3, f4 expressed in sum-of-minterms form as given below.
f1 = β(0,2,3,5,7,8,11,13)
f2 = β(1,3,5,7,11,13,15)
f3 = β(0,1,4,11)
f4 = β(0,2,6,13)

Explanation:
Let us evaluate the output of each logic gate step-by-step using minterm sets to find the final expression for Y.
1. Analyze the AND Gate Output:
The inputs to the AND gate are f1 and f2. The logical AND operation corresponds to the intersection (β©) of their minterm sets (the minterms present in both functions).
β’ f1 = {0, 2, 3, 5, 7, 8, 11, 13}
β’ f2 = {1, 3, 5, 7, 11, 13, 15}
OutputAND = f1 β© f2 = {3, 5, 7, 11, 13}
2. Analyze the OR Gate Output:
The inputs to the OR gate are f3 and f4. The logical OR operation corresponds to the union (βͺ) of their minterm sets (combining all elements from both functions).
β’ f3 = {0, 1, 4, 11}
β’ f4 = {0, 2, 6, 13}
OutputOR = f3 βͺ f4 = {0, 1, 2, 4, 6, 11, 13}
3. Analyze the Final XOR Gate Output (Y):
The final output Y is the XOR of OutputAND and OutputOR. The logical XOR operation corresponds to the symmetric difference (Ξ) of the two sets (elements that are in either of the sets, but not both).
β’ OutputAND = {3, 5, 7, 11, 13}
β’ OutputOR = {0, 1, 2, 4, 6, 11, 13}
Let's find the common elements (intersection) first:
β’ Common minterms shared by both paths = {11, 13}
Filter out these common elements from the combined set to get the symmetric difference:
Y = β(0, 1, 2, 3, 4, 5, 6, 7)
4. Evaluate the Minterm Options:
β’ Option (a): Y = β(0, 1, 2, 11, 13) — Incorrect.
β’ Option (c): Y = β(0, 1, 2, 3, 4, 5, 6, 7) — Correct.
5. Convert to Maxterm Form:
Since this is a 4-variable function, the total possible minterms span from 0 to 15. The product-of-maxterms (β) expression consists of all the numbers missing from our sum-of-minterms list:
Missing terms = {8, 9, 10, 11, 12, 13, 14, 15}
Y = β(8, 9, 10, 11, 12, 13, 14, 15)
β’ Option (b): Y = β(3, 4, 5, 6, 7, 8, 9, 10, 12, 14, 15) — Incorrect.
β’ Option (d): Y = β(8, 9, 10, 11, 12, 13, 14, 15) — Correct.
6. Conclusion:
Options c and d are the logically valid statements for this digital network.
Ques 3 Gate 2024 Set-2
Consider the following expression: π₯[π]=(π+π)ββπ [π]+π’/π€. The following sequence shows the list of triples representing the given expression, with entries missing for triples (1), (3), and (6).

Explanation:
To determine the missing elements, let's break down how three-address code triples represent array accesses and assignments. A triple consists of three fields: op (operator), arg1, and arg2. When referencing the result of a previous operation, the row number enclosed in parenthesesβlike (0)βis used.
1. Analyze Triple (1): Array Indexing of s[i]
β’ The sub-expression is s[i].
β’ In three-address code triples, an array access/r-value lookup uses the array base address and index. The operator is represented as =[].
β’ Therefore, row (1) evaluates s[i]:
(1) =[] s i
β’ This eliminates options (b) and (d), which specify []= (used for array assignment/l-value, not lookup).
2. Analyze Triple (2): Unary Minus
β’ Looking at the table, row (2) computes uminus (1), which represents -s[i]. This confirms our deduction for row (1) is correct.
3. Analyze Triple (3): Multiplication
β’ The expression requires multiplying (p+r) by -s[i].
β’ Row (0) computed + p r (which is p+r).
β’ Row (2) computed -s[i].
β’ Therefore, row (3) must perform the multiplication of row (0) and row (2):
(3) * (0) (2)
4. Analyze Triples (4) and (5): Addition with u/w
β’ Row (4) computes / u w (which is u/w).
β’ Row (5) adds row (3) and row (4) together: + (3) (4). This represents the entire right-hand side of our assignment equation.
5. Analyze Triple (6): Target Array Location x[i]
β’ The value calculated in row (5) needs to be stored into the left-hand side array position x[i].
β’ Before a value can be assigned to an array element, we define its l-value location using the array base address and index with the element assignment operator []=.
β’ Therefore, row (6) targets the x[i] element:
(6) []= x i
6. Analyze Triple (7): Assignment
β’ Row (7) shows = (6) (5), which copies the computed right-hand side expression from row (5) into the array destination specified in row (6).
7. Conclusion:
Matching our findings (1) =[] s i, (3) * (0) (2), and (6) []= x i directly corresponds to choice (c).
Ques 4 Gate 2024 Set-2
Consider an array X that contains n positive integers. A subarray of X is defined to be a sequence of array locations with consecutive indices. The C code snippet given below has been written to compute the length of the longest subarray of X that contains at most two distinct integers. The code has two missing expressions labelled (π)β‘and (π).

(Hint: At the end of the i-th iteration, the value of len1 is the length of the longest subarray ending with X[i] that contains all equal values, and len2 is the length of the longest subarray ending with X[i] that contains at most two distinct values.)
Explanation:
Let us analyze the logic using the hint provided:
β’ len1 tracks the length of the longest subarray ending at X[i] containing all equal elements (a sequence of the current active element).
β’ len2 tracks the length of the longest subarray ending at X[i] containing at most two distinct elements.
At the very end of every iteration, the statement first = X[i]; runs. This means first always holds the element processed in the previous iteration, and second holds the distinct element seen right before that continuous sequence of first broke.
1. Finding Expression (P):
β’ This block executes when X[i] == second.
β’ Since X[i] matches second, the old continuous sequence of first is broken.
β’ The new continuous sequence of equal elements now consists of the old second element plus the current X[i].
β’ Since second was located adjacent to the continuous block of first, the new continuous sequence length becomes the count of the previous continuous block (len1) plus 1 for the current element.
(P) = len1 + 1
2. Finding Expression (Q):
β’ This block executes when X[i] is completely new (does not match first or second).
β’ Since it is a third distinct element, we must drop the older distinct element (second) to keep at most two distinct elements.
β’ The new valid subarray can only consist of the most recent continuous block of equal elements (first) and the current new element X[i].
β’ Therefore, the new total length len2 becomes the length of the continuous block of first (which is len1) plus 1 for the current element.
(Q) = len1 + 1
Conclusion:
Both (P) and (Q) must be len1 + 1, matching option (c).
Ques 5 Gate 2022
Consider a digital display system (DDS) shown in the figure that displays the
contents of register X. A 16-bit code word is used to load a word in X, either from
S or from R. S is a 1024-word memory segment and R is a 32-word register file.
Based on the value of mode bit M, T selects an input word to load in X. P and Q
interface with the corresponding bits in the code word to choose the addressed word.
Which one of the following represents the functionality of P, Q, and T?
Ques 6 Gate 2022
The following simple undirected graph is referred to as the Peterson graph
Which of the following statements is/are TRUE?
Ques 7 Gate 2022
Let R1 and R2 be two 4-bit registers that store numbers in 2βs complement form. For the operation R1+R2, which one of the following values of R1 and R2 gives an arithmetic overflow?
Ques 8 GATE 2021 SET-1
Consider a 3-bit counter, designed using T flip-flops, as shown below:

Ques 9 GATE 2021 SET-1
Consider the following Boolean expression.
F = (X + Y + Z)(XΜ
+ Y)(YΜ
+ Z)
Which of the following Boolean expressions is/are equivalent to FΜ
(complement of F)?
Ques 10 GATE 2021 SET-1
Consider the following Boolean expression.
F = (X + Y + Z)(XΜ
+ Y)(YΜ
+ Z)
Which of the following Boolean expressions is/are equivalent to FΜ
(complement of F)?
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