Electrical Engineering Gate Yearwise 




Electrical Engineering GATE 2017 Set II Questions with Answer

Ques 1 Analog Electronics

For the circuit shown in the figure below, it is given that VCE = VCC/2. The transistor has β=29 and VBE=0.7 V when the B-E junction is forward biased. For this circuit, the value of RB/R is

A

43

B

92

C

121

D

129



Ques 2 Analog Electronics

For the circuit shown below, assume that the OPAMP is ideal. Which one of the following is TRUE?

A

vo = vs

B

vo = 1.5 vs

C

vo = 2.5 vs

D

vo = 5vs



Ques 3 Circuit Theory

For the given 2-port network, the value of transfer impedance z21 in ohms is ________.


3 is the correct answer.


Ques 4 Circuit Theory

The initial charge in the 1 F capacitor present in the circuit shown is zero. The energy in joules transferred from the DC source until steady state condition is reached equals ________. (Give the answer up to one decimal place.)


100 is the correct answer.


Ques 5 Circuit Theory

For the balanced Y-Y connected 3-phase circuit shown in the figure below, the line-line voltage is 208 V rms and the total power absorbed by the load is 432 W at a power factor of 0.6 leading.

The approximate value of the impedance Z is

A

33∠-53.1° Ω

B

60∠53.1° Ω

C

60∠-53.1° Ω

D

180∠-53.1° Ω



Ques 6 Circuit Theory

In the circuit shown below, the value of capacitor C required for maximum power to be transferred to the load is

A

1 nF

B

1 µF

C

1 mF

D

10 mF



Ques 7 Circuit Theory

For the network given in figure below, the Thevenin's voltage Vab is

A

-1.5 V

B

-0.5 V

C

0.5 V

D

1.5 V



Ques 8 Control Systems

The root locus of the feedback control system having the characteristic equation s2 + 6Ks + 2s + 5 = 0 where K > 0, enters into the real axis at

A

s=-1

B

s=-√5

C

s=-5

D

s=√5



Ques 9 Control Systems

The range of K for which all the roots of the equation s3 + 3s2 + 2s + K = 0 are in the left half of the complex s-plane is

A

0 < K < 6

B

0 < K < 16

C

6 < K < 36

D

6 < K < 16



Ques 10 Control Systems

Which of the following systems has maximum peak overshoot due to a unit step input?

A

100/(s2+10s+100)

B

100/(s2+15s+100)

C

100/(s2+5s+100)

D

100/(s2+20s+100)



Ques 11 Control Systems

Consider the system described by the following state space representation

If u(t) is a unit step input and , the value of output y(t) at t=1 sec (rounded off to three decimal places) is ________.


1.284 is the correct answer.


Ques 12 Digital Electronics

For the synchronous sequential circuit shown below, the output Z is zero for the initial conditions QAQBQC = Q'AQ'BQ'C = 100. The minimum number of clock cycles after which the output Z would again become zero is ________.


6 is the correct answer.


Ques 13 Electrical Machines

A 3-phase, 4-pole, 400 V, 50 Hz squirrel-cage induction motor is operating at a slip of 0.02. The speed of the rotor flux in mechanical rad/sec, sensed by a stationary observer, is closest to

A

1500

B

1470

C

157

D

154



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