CS and IT Gate 2024 Set-1 Questions with Answer

Ques 53 GATE 2024 SET-1


Consider a memory management system with a page size of 2 KB. Assume that both the physical and virtual addresses start from 0. Assume that the pages 0, 1, 2, and 3 are stored in the page frames 1, 3, 2, and 0, respectively. The physical address (in decimal format) corresponding to the virtual address 2500 (in decimal format) is _________.


(6652) is the correct answer.

Ques 54 GATE 2024 SET-1


Consider the following two regular expressions over the alphabet

The total number of strings of length less than or equal to 5, which are neither in r nor in s, is


(12) is the correct answer.

Ques 55 GATE 2024 SET-1


Consider a digital logic circuit consisting of three 2-to-1 multiplexers M1, M2, and M3 as shown below. X1 and X2 are inputs of M1. X3 and X4 are inputs of M2. A, B, and C are select lines of M1, M2, and M3, respectively.

For an instance of inputs X1 = 1, X2 = 1, X3 = 0, and X4 = 0, the number of combinations of A, B, C that give the output Y = 1 is


(4) is the correct answer.

Ques 56 GATE 2024 SET-1


Consider sending an IP datagram of size 1420 bytes (including 20 bytes of IP header) from a sender to a receiver over a path of two links with a router between them. The first link (sender to router) has an MTU (Maximum Transmission Unit) size of 542 bytes, while the second link (router to receiver) has an MTU size of 360 bytes. The number of fragments that would be delivered at the receiver is


(5) is the correct answer.

Ques 57 Gate 2024 Set-1


Given an integer array of size N, we want to check if the array is sorted (in either ascending or descending order). An algorithm solves this problem by making a single pass through the array and comparing each element of the array only with its adjacent elements. The worst-case time complexity of this algorithm is

A

both Ο(𝑁) and Ξ©(𝑁)

B

Ο(𝑁) but not Ξ©(𝑁)

C

Ξ©(𝑁) but not Ο(𝑁)

D

neither Ο(𝑁) nor Ξ©(𝑁)


(a) is the correct answer.

Ques 58 Gate 2024 Set-1


In a B+ tree, the requirement of at least half-full (50%) node occupancy is relaxed for which one of the following cases?

A

Only the root node

B

All leaf nodes

C

All internal nodes

D

Only the leftmost leaf node


(a) is the correct answer.

Ques 59 Gate 2024 Set-1


Let S be the specification: "Instructors teach courses. Students register for courses. Courses are allocated classrooms. Instructors guide students." Which one of the following ER diagrams CORRECTLY represents S?

A

(i)

B

(ii)

C

(iii)

D

(iv)


(a) is the correct answer.

Ques 60 Gate 2024 Set-1


Let 𝑓: ℝ β†’ ℝ be a function such that 𝑓(π‘₯) = max{π‘₯, π‘₯3}, π‘₯ ∈ ℝ , where ℝ is the set of all real numbers. The set of all points where 𝑓(π‘₯) is NOT differentiable is

A

{βˆ’1, 1, 2}

B

{βˆ’2, βˆ’1, 1}

C

{0, 1}

D

{βˆ’1, 0, 1}


(a) is the correct answer.

Ques 61 Gate 2024 Set-1


The product of all eigenvalues of the matrix

is

A

βˆ’1

B

0

C

2

D

2


(a) is the correct answer.

Ques 62 Gate 2024 Set-1


Consider a system that uses 5 bitsfor representing signed integers in 2’s complement format. In this system, two integers 𝐴 and 𝐡 are represented as 𝐴=01010 and 𝐡=11010. Which one of the following operations will result in either an arithmetic overflow or an arithmetic underflow?

A

𝐴 + 𝐡

B

𝐴 βˆ’ 𝐡

C

𝐡 βˆ’ 𝐴

D

2 βˆ— 𝐡


(a) is the correct answer.

Ques 63 Gate 2024 Set-1


Consider a permutation sampled uniformly at random from the set of all permutations of {1, 2, 3, β‹― , 𝑛} for some 𝑛 β‰₯ 4. Let 𝑋 be the event that 1 occurs before 2 in the permutation, and π‘Œ the event that 3 occurs before 4. Which one of the following statements is TRUE?

A

The events 𝑋 and π‘Œ are mutually exclusive

B

The events 𝑋 and π‘Œ are independent

C

Either event 𝑋 or π‘Œ must occur

D

Event 𝑋 is more likely than event π‘Œ


(a) is the correct answer.

Ques 64 Gate 2024 Set-1


Which one of the following statements is FALSE?

A

In the cycle stealing mode of DMA, one word of data is transferred between an I/O device and main memory in a stolen cycle

B

For bulk data transfer, the burst mode of DMA has a higher throughput than the cycle stealing mode

C

Programmed I/O mechanism has a better CPU utilization than the interrupt driven I/O mechanism

D

The CPU can start executing an interrupt service routine faster with vectored interrupts than with non-vectored interrupts


(a) is the correct answer.

Unique Visitor Count

Total Unique Visitors

Loading......