CS/IT Gate Yearwise
CS/IT Gate 2025 (Set 2)
CS/IT Gate 2024 (Set 1)
CS/IT Gate 2024 (Set 2)
CS/IT Gate 2023
CS/IT Gate 2022
CS/IT Gate 2021 (Set 1)
CS/IT Gate 2021 (Set 2)
CS/IT Gate 2020
CS/IT Gate 2019
CS/IT Gate 2018
CS/IT Gate 2017 (Set 1)
CS/IT Gate 2017 (Set 2)
CS/IT Gate 2016 (Set 1)
CS/IT Gate 2016 (Set 2)
CS/IT Gate 2015 (Set 1)
CS/IT Gate 2015 (Set 2)
CS/IT Gate 2015 (Set 3)
CS/IT Gate 2014 (Set 1)
CS/IT Gate 2014 (Set 2)
CS/IT Gate 2014 (Set 3)
CS and IT GATE 2023 Questions with Answer
Ques 27 Computer Science
The value of the definite integral
∫-33∫-22∫-11(4x2y - z3)dz dy dx
(Rounded off to the nearest integer) is _______.
0 is the correct answer.
Ques 28 Computer Science
A particular number is written as 132 in radix-4 representation. The same number in radix-5 representation is _______.
44 is the correct answer.
Ques 29 Computer Science
Consider a 3-stage pipelined processor having a delay of 10 ns (nanoseconds), 20 ns, and 14 ns, for the first, second, and the third stages, respectively. Assume that there is no other delay and the processor does not suffer from any pipeline hazards. Also assume that one instruction is fetched every cycle. The total execution time for executing 100 instructions on this processor is _______ ns.
2140 is the correct answer.
Ques 30 Computer Science
A keyboard connected to a computer is used at a rate of 1 keystroke per second. The computer system polls the keyboard every 10 ms (milli seconds) to check for a keystroke and consumes 100 μs (micro seconds) for each poll. If it is determined after polling that a key has been pressed, the system consumes an additional 200 μs to process the keystroke. Let T1 denote the fraction of a second spent in polling and processing a keystroke. In an alternative implementation, the system uses interrupts instead of polling. An interrupt is raised for every keystroke. It takes a total of 1 ms for servicing an interrupt and processing a keystroke. Let T2 denote the fraction of a second spent in servicing the interrupt and processing a keystroke. The ratio T1/T2 is _______. (Rounded off to one decimal place)
1.2 is the correct answer.
Ques 31 Computer Science
The integer value printed by the ANSI-C program given below is _______.

7 is the correct answer.
Ques 32 Computer Science
Consider the following program:

Ques 33 Computer Science
Consider the control flow graph shown.

Ques 34 Computer Science
Consider the two functions incr and decr shown below.

Suppose there are two implementations of the semaphore s, as follows:
I-1: s is a binary semaphore initialized to 1
I-2: s is a counting semaphore initialized to 2. Let V1, V2 be the values of X at the end of execution of all the threads with implementations I-1, 1-2, respectively.
Which one of the following choices corresponds to the minimum possible values of V1, V2, respectively?
Ques 35 Computer Science
Consider the context-free grammar G below:
S -> aSb | X
X -> aX | Xb | a | b
where S and X are non-terminals, and a and b are terminal symbols. The starting non-terminal is S.
Which one of the following statements is CORRECT?
Ques 36 Computer Science
Consider the pushdown automaton (PDA) P below, which runs on the input alphabet {a,b}, has stack alphabet {⊥, A}, and has three states {s,p,q}, with s being the start state. A transition from state u to state v, labelled c/X/γ where c is an input symbol or e, X is a stack symbol, and γ is a string of stack symbols, represents the fact that in state u, the PDA can read c from the input, with X on the top of its stack, pop X from the stack, push in the string γ on the stack, and go to state v. In the initial configuration, the stack has only the symbol ⊥ in it. The PDA accepts by empty stack.

Ques 37 Computer Science
Consider the given C-code and its corresponding assembly code, with a few operands U1-U4 being unknown. Some useful information as well as the semantics of each unique assembly instruction is annotated as inline comments in the code. The memory is byte-addressable.

Ques 38 Computer Science
A 4 kilobyte (KB) byte-addressable memory is realized using four 1 KB memory blocks. Two input address lines (IA4 and IA3) are connected to the chip select (CS) port of these memory blocks through a decoder as shown in the figure. The remaining ten input address lines from IA11-IA0 are connected to the address port of these blocks. The chip select (CS) is active high.

Ques 39 Computer Science
Consider a sequential digital circuit consisting of T flip-flops and D flip-flops as shown in the figure. CLKIN is the clock input to the circuit. At the beginning, Q1, Q2 and Q3 have values 0, 1 and 1, respectively.


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