CS and IT GATE 2025 SET-1 Questions with Answer

Ques 14 Computer Networks

Suppose a message of size 15000 bytes is transmitted from a source to a destination using IPv4 protocol via two routers as shown in the figure. Each router has a defined maximum transmission unit (MTU) as shown in the figure, including IP header. The number of fragments that will be delivered to the destination is ______ (Answer in integer)

Ques 15 Computer Organization and Architecture

Suppose a program is running on a non-pipelined single processor computer system. The computer is connected to an external device that can interrupt the processor asynchronously. The processor needs to execute the interrupt service routine (ISR) to serve this interrupt. The following steps (not necessarily in order) are taken by the processor when the interrupt arrives:
(i) The processor saves the content of the program counter.
(ii) The program counter is loaded with the start address of the ISR.
(iii) The processor finishes the present instruction.
Which ONE of the following is the CORRECT sequence of steps?

(iii), (i), (ii)

(i), (iii), (ii)

(i), (ii), (iii)

(iii), (ii), (i)

Ques 16 Computer Organization and Architecture

The number -6 can be represented as 1010 in 4-bit 2's complement representation. Which of the following is/are CORRECT 2's complement representation(s) of -6?

1000 1010 in 8-bits

1111 1010 in 8-bits

1000 0000 0000 1010 in 16-bits

1111 1111 1111 1010 in 16-bits

Ques 17 Computer Organization and Architecture

A partial data path of a processor is given in the figure, where RA, RB, and RZ are 32-bit registers. Which option(s) is/are CORRECT related to arithmetic operations using the data path as shown?

The data path can implement arithmetic operations involving two registers.

The data path can implement arithmetic operations involving one register and one immediate value.

The data path can implement arithmetic operations involving two immediate values.

The data path can only implement arithmetic operations involving one register and one immediate value.

Ques 18 Computer Organization and Architecture

Consider a memory system with 1M bytes of main memory and 16K bytes of cache memory. Assume that the processor generates 20-bit memory address, and the cache block size is 16 bytes. If the cache uses direct mapping, how many bits will be required to store all the tag values? [Assume memory is byte addressable, 1K=2¹⁰, 1M=2²⁰.]

6×2¹⁰

8×2¹⁰

2¹²

2¹⁴

Ques 19 Computer Organization and Architecture

A processor has 64 general-purpose registers and 50 distinct instruction types. An instruction is encoded in 32-bits. What is the maximum number of bits that can be used to store the immediate operand for the given instruction?
ADD R1, #25 //R1=R1+25

Ques 20 Computer Organization and Architecture

A computer has a memory hierarchy consisting of two-level cache (L1 and L2) and a main memory. If the processor needs to access data from memory, it first looks into L1 cache. If the data is not found in L1 cache, it goes to L2 cache. If it fails to get the data from L2 cache, it goes to main memory, where the data is definitely available. Hit rates and access times of various memory units are shown in the figure. The average memory access time in nanoseconds (ns) is ______ (rounded off to two decimal places)

Ques 21 Data Structures

Which of the following statement(s) is/are TRUE for any binary search tree (BST) having n distinct integers?

The maximum length of a path from the root node to any other node is (n-1).

An inorder traversal will always produce a sorted sequence of elements.

Finding an element takes O(log₂n) time in the worst case.

Every BST is also a Min-Heap.

Ques 22 Data Structures

The height of any rooted tree is defined as the maximum number of edges in the path from the root node to any leaf node.
Suppose a Min-Heap T stores 32 keys. The height of T is ______ (Answer in integer)

Ques 23 Data Structures

In a double hashing scheme, h₁(k)=k mod 11 and h₂(k)=1+(k mod 7) are the auxiliary hash functions. The size m of the hash table is 11. The hash function for the i-th probe in the open address table is [h₁(k)+i h₂(k)] mod m. The following keys are inserted in the given order: 63, 50, 25, 79, 67, 24.
The slot at which key 24 gets stored is ______ (Answer in integer)

Ques 24 Databases

A schedule of three database transactions T₁, T₂, and T₃ is shown.
R_i(A) and W_i(A) denote read and write of data item A by transaction T_i,i=1,2,3.
The transaction T₁ aborts at the end. Which other transaction(s) will be required to be rolled back?
R₁(X)W₁(Y)R₂(X)R₂(Y)R₃(Y)ABORT(T₁)

Only T₂

Only T₃

Both T₂ and T₃

Neither T₂ nor T₃

Ques 25 Databases

Consider the following B⁺ tree with 5 nodes, in which a node can store at most 3 key values. The value 23 is now inserted in the B⁺ tree. Which of the following options(s) is/are CORRECT?

None of the nodes will split.

At least one node will split and redistribute.

The total number of nodes will remain same.

The height of the tree will increase.

Ques 26 Databases

Consider two relations describing teams and players in a sports league:
• teams (tid, tname): tid, tname are team-id and team-name, respectively
• players (pid, pname, tid): pid, pname, and tid denote player-id, player-name and the team-id of the player, respectively
Which ONE of the following tuple relational calculus queries returns the name of the players who play for the team having tname as 'MI'?

{ p.pname | p ∈ players ∃t (t ∈ teams &land; p.tid = t.tid &land; t.tname = 'MI')}

{p.pname | p∈ teams ∃t (t ∈ players &land; p.tid = t.tid &land; t.tname = 'MI')}

{ p.pname | p ∈ players ∃t (t ∈ teams &land; t.tname = 'MI')}

{p.pname | p∈ teams ∃t (t∈ players &land; t.tname = 'MI')}

1 2 3 4 5

Total Unique Visitors

Loading......

CS/IT Gate Yearwise

CS and IT GATE 2025 SET-1 Questions with Answer