CS/IT Gate Yearwise
CS/IT Gate 2025 (Set 2)
CS/IT Gate 2024 (Set 1)
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CS/IT Gate 2023
CS/IT Gate 2022
CS/IT Gate 2021 (Set 1)
CS/IT Gate 2021 (Set 2)
CS/IT Gate 2020
CS/IT Gate 2019
CS/IT Gate 2018
CS/IT Gate 2017 (Set 1)
CS/IT Gate 2017 (Set 2)
CS/IT Gate 2016 (Set 1)
CS/IT Gate 2016 (Set 2)
CS/IT Gate 2015 (Set 1)
CS/IT Gate 2015 (Set 2)
CS/IT Gate 2015 (Set 3)
CS/IT Gate 2014 (Set 1)
CS/IT Gate 2014 (Set 2)
CS/IT Gate 2014 (Set 3)
CS and IT GATE 2022 Questions with Answer
Ques 40 Discrete Mathematics
Which of the following statements is/are TRUE for a group G ?
Ques 41 Mathematics
A function y(x) is defined in the interval [0, 1] on the 𝑥-axis as

Ques 42 Mathematics
The value of the following limit is ____________

-0.5 is the correct answer.
Ques 43 Mathematics
The number of arrangements of six identical balls in three identical bins is______.
Ques 44 Mathematics
Consider the following two statements with respect to the matrices Am×n , Bn×m , Cn×n and Dn×n
Statement 1: tr(AB) = tr(BA)
Statement 2: tr(CD) = tr(DC)
where tr() represents the trace of a matrix. Which one of the following holds?
Ques 45 Operating System
Consider four processes P, Q, R, and S scheduled on a CPU as per round robin algorithm with a time quantum of 4 units. The processes arrive in the order P, Q, R, S, all at time t = 0. There is exactly one context switch from S to Q, exactly one context switch from R to Q, and exactly two context switches from Q to R. There is no context switch from S to P. Switching to a ready process after the termination of another process is also considered a context switch. Which one of the following is NOT possible as CPU burst time (in time units) of these processes?
Ques 46 Operating System
Which of the following statements is/are TRUE with respect to deadlocks?
Ques 47 Operating System
Consider a demand paging system with four-page frames (initially empty) and an LRU page replacement policy. For the following page reference string 7, 2,7,3, 2,5,3, 4,6,7,7,1,5,6,1 the page fault rate, defined as the ratio of number of page faults to the number of memory accesses (rounded off to one decimal place) is_________.
0.6 is the correct answer.
Ques 48 Operating System
A cache memory that has a hit rate of 0.8 has an access latency 10 ns and miss penalty 100 ns. Optimization is done on the cache to reduce the miss rate. However, the optimization results in an increase of cache access latency to 15 ns, whereas the miss penalty is not affected. The minimum hit rate (rounded off to two decimal places) needed after the optimization such that it should not increase the average memory access time is _____.
0.85 is the correct answer.

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