Electrical Engineering > GATE 2013 SET-1 > Logic Circuits
In the circuit shown below, Q1 has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If V<sub>cc</sub> is +5 V, X and Y are digital signals with 0 V as logic 0 and Vcc as logic 1, then the Boolean expression for Z is
Correct :
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