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A 4-bit weighted-resistor DAC with inputs b3, b2, b1, and b0 (MSB to LSB) is designed using an ideal opamp, as shown below. The switches are closed when the corresponding input bits are logic '1' and open otherwise.
When the input b3b2b1b0 changes from 1110 to 1101, the magnitude of the change in the output voltage Vo (in mV, rounded off to the nearest integer) is
When the input b3b2b1b0 changes from 1110 to 1101, the magnitude of the change in the output voltage Vo (in mV, rounded off to the nearest integer) is
Correct : 125
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