The synchronous sequential circuit shown below works at a clock frequency of 1 GHz. The throughput, in Mbits/s, and the latency, in ns, respectively, are

In a given sequential circuit, initial states are Q1 = 1 and Q2 = 0. For a clock frequency of 1 MHz, the frequency of signal Q2 in kHz, is ____ (rounded off to...

A positive-edge-triggered sequential circuit is shown below. There are no timing violations in the circuit. Input PO is set to logic '0' and P1 is set to logic...