EC > GATE 2020 > MOSFET Circuits
An enhancement MOSFET of threshold voltage 3 V is being used in the sample and hold circuit given below. Assume that the substrate of the MOS device is connected to -10 V. If the input voltage V_I lies between ±10 V, the minimum and the maximum values of VG required for proper sampling and holding respectively, are


Correct : c
Similar Questions
In the circuit shown below, VI and V2 are bias voltages. Based on input and output impedances, the circuit behaves as a
In the circuit below, the voltage VL is ____ V (rounded off to two decimal places).
The identical MOSFETS M1 and M2 in the circuit given below are ideal and biased in the saturation region. M1 and M2 have a transconductance gm of 5 ms.The input...
Total Unique Visitors
Loading......