EC > GATE 2018 > Memory
A 2x2 ROM array is built with the help of diodes as shown in the circuit below. Here WO and W1 are signals that select the word lines and BO and B1 are signals that are output of the sense amps based on the stored data corresponding to the bit lines during the read operation.
During the read operation, the selected word line goes high and the other word line is in a high impedance state. As per the implementation shown in the circuit diagram above, what are the bits corresponding to Dij (where i=0 or 1 and j=0 or 1) stored in the ROM?
Correct : a
Similar Questions
In a DRAM,
In a DRAM,
In a DRAM,
Total Unique Visitors
Loading......