EC > GATE 2015 SET-3 > Sequential Circuits
An SR latch is implemented using TTL gates as shown in the figure. The set and reset pulse inputs are provided using the push-button switches. It is observed that the circuit fails to work as desired. The SR latch can be made functional by changing
A
NOR gates to NAND gates
B
inverters to buffers
C
NOR gates to NAND gates and inverters to buffers
D
5 V to ground

Correct : d

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Related Topics

SR latch EC gate TTL gate implementation SR latch circuit failure GATE EC 2015 NOR to NAND conversion inverters to buffers gate logic EC GATE EC 2015 Set-3 SR latch functional logic gates EC

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