EC > GATE 2013 SET-4 > Logic Circuits
In the circuit shown below, Q1 has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If Vcc is +5 V, X and Y are digital signals with 0 V as logic 0 and Vcc as logic 1, then the Boolean expression for Z is
A
X̄Ȳ
B
X̄Y
C
XȲ
D
XY

Correct : b

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Related Topics

logic gates EC GATE GATE EC 2013 Boolean algebra EC digital logic circuits gate EC gate 2013 set 4 logic gates circuit analysis EC gate exam

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