EC > GATE 2013 SET-3 > Logic Circuits
In the circuit shown below, Q1 has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If Vcc is +5 V, X and Y are digital signals with 0 V as logic 0 and Vcc as logic 1, then the Boolean expression for Z is
A
X̄Ȳ
B
X̄Y
C
XȲ
D
XY

Correct : b

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Related Topics

logic gates EC GATE GATE EC 2013 digital circuits Boolean algebra GATE gate EC logic gate Z X and Y signals gate set 3 question 43

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