EC > GATE 2013 SET-1 > Logic Circuits
In the circuit shown below, Q1 has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If Vcc is +5 V, X and Y are digital signals with 0 V as logic 0 and Vcc as logic 1, then the Boolean expression for Z is
A
X̅Y̅
B
X̅Y
C
XY̅
D
XY

Correct : a

Similar Questions

In the circuit shown below, Q1 has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If Vc...
#1269 MCQ
In the circuit shown below, Q1 has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If Vc...
#1346 MCQ
In the circuit shown below, Q1 has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If Vc...
#1399 MCQ

Related Topics

No tags found

Unique Visitor Count

Total Unique Visitors

Loading......