Correct : c

The correct answer is Option C — S1 is true and S2 is false.
S1 — Non-vectored vs vectored interrupt latency: In a vectored interrupt, the interrupting device directly supplies the starting address of its ISR to the CPU upon acknowledgement, so the CPU jumps to the correct handler immediately. In a non-vectored interrupt, all interrupts redirect to a single fixed address, and the ISR must then identify the source — typically by polling status registers — before branching to the correct handler. This identification overhead means non-vectored interrupts take more time to start the actual ISR. S1 is TRUE.
S2 — Daisy-chain mechanism: In daisy-chain interrupt handling, devices are connected in a hardware priority chain. When the CPU issues an interrupt-acknowledge signal, it propagates down the chain and is intercepted by the highest-priority device that raised the interrupt. That device then places its vector (device ID or ISR address) on the data bus — the CPU does not poll devices individually. Polling is a separate, software-based mechanism where the CPU explicitly checks each device one by one. Daisy-chaining is entirely hardware-driven. S2 is FALSE.