Correct : a

Physical address is 32 bits. Block size = 128 = 2⁷ bytes → 7 offset bits. Cache capacity = 2²³ bytes → total cache lines = 2²³/2⁷ = 2¹⁶.
Direct Mapped Cache — TAG bits M
In a direct mapped cache every cache line maps to exactly one set, so number of sets = number of lines = 2¹⁶. Index bits = 16. TAG bits M = 32 − 16 − 7 = 9.
K-way Set Associative Cache — TAG bits N
With K = 2^L ways, each set holds K lines. Number of sets = 2¹⁶ / 2^L = 2^16−L. Set index bits = 16 − L. TAG bits N = 32 − (16−L) − 7 = 9 + L = M + L.
The intuition is clear — going from direct mapped to K-way set associative reduces the number of sets by a factor of K = 2^L, so the index field shrinks by L bits. Those L bits move into the TAG field, making the TAG L bits longer. Hence N = M + L.
Correct answer: A — N = M + L ✓