Correct : c

The correct answer is Option C: Read-after-write.
Among all register dependencies, RAW is the one that causes a true data hazard in a pipelined processor. It happens when a later instruction needs to read a register that an earlier instruction is still in the process of writing. Since the pipeline overlaps instruction execution, the later instruction may read a stale (old) value before the write is completed - this is a genuine hazard.
Here"s a quick summary of all four dependencies:
• RAW (Read after Write): True data dependency - causes real hazards. The pipeline must stall or use data forwarding to resolve it.
• WAR (Write after Read): Anti-dependency - not a hazard in a simple in-order pipeline since the read always happens before the write in program order.
• WAW (Write after Write): Output dependency - not a hazard in a basic in-order pipeline; writes complete in program order.
• RAR (Read after Read): Not a dependency at all - reading a register from multiple instructions simultaneously causes no conflict whatsoever.