Correct : a

The correct answer is Option A.
In a load-store architecture, arithmetic and logic instructions can only operate on register operands — they cannot directly access memory. Memory is accessed exclusively through Load (memory → register) and Store (register → memory) instructions. This is the fundamental characteristic of RISC-style processors.
To compute z = x + y where x, y, z are memory operands, the correct sequence is:
Load R0, x - bring x from memory into register R0
Load R1, y - bring y from memory into register R1
ADD R2, R0, R1 - add R0 and R1, store result in R2 (first operand R2 is the destination)
Store Z, R2 - write result from R2 back to memory location z
This is exactly Option A and it correctly follows all load-store rules.
Option B - ADD Z, R0, y: uses memory operand y directly in ADD. Not allowed in load-store ISA.
Option C - ADD R0, x, y: uses two memory operands in ADD. Not allowed.
Option D - ADD Z, x, y: uses memory as both operands and destination in ADD. Not allowed.
The rule is simple - in load-store ISA, ADD never touches memory. Load and Store are the only instructions that do.