Computer Sciences > GATE 2025 SET-1 > Memory Hierarchy
A computer has a memory hierarchy consisting of two-level cache (L1 and L2) and a main memory. If the processor needs to access data from memory, it first looks into L1 cache. If the data is not found in L1 cache, it goes to L2 cache. If it fails to get the data from L2 cache, it goes to main memory, where the data is definitely available. Hit rates and access times of various memory units are shown in the figure. The average memory access time in nanoseconds (ns) is ______ (rounded off to two decimal places)
Correct : 11.87
AMAT = TL1 + (1 - HL1) × [TL2 + (1 - HL2) × TMM]
where TL1, TL2, TMM are the access times of L1, L2, and main memory, and HL1, HL2 are their respective hit rates.
Every memory access always checks L1 first (TL1 is always paid). On an L1 miss, L2 is checked. On an L2 miss, main memory is accessed.
Substituting the values from the given figure into the formula gives an AMAT of approximately 11.85 ns, which falls within the official accepted range of 11.83 to 11.87.
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