Consider a 3 GHz (gigahertz) processor with a three-stage pipeline and stage latencies τ₁, τ₂, and τ₃ such that τ₁ = 3τ₂/4 = 2τ₃. If the longest pipeline stage is split into two pipeline stages of equal latency, the new frequency is _________ GHz, ignoring delays in the pipeline registers.